The present invention relates to computer memory, and more specifically, to integrated functional built-in self test for a chip.
Integrated circuit operational speeds (i.e., signal frequencies) often outpace test equipment. Moreover, these chips often have complex internal state structures, such as significant embedded memory arrays.
In some cases chips are tested to ensure that certain bits in the chips are operating correctly. Chips may have interfaces to connect to peripheral devices that communicate with the chip. In some cases, the functionality of the interfaces to peripheral devices may not be tested until a peripheral device is actually coupled to the chip.